Image by Laura Ockel

A New Paradigm of VLSI Design

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Beyond CMOS?

Microprocessors are the oil of

the digital age.

NeoLogic is powering the next-generation processors by breaking the limits
of the CMOS design paradigm that dominated VLSI design since the 1970s. Our patent-pending (Quasi-CMOS) technology cuts down the transistors count of digital cores by up to 3x at any technology node. Our design results in up to 50% reduction of power dissipation as well as up to 40% area saving thereby delivering up to 3X
performance-per-watt superiority for any design at any technology node.

Leapfrog

Up to 3 Technology nodes!

NeoMOS-based processors Low-power, Smaller, Faster

Neologic is a member of the American Semiconductor Innovation Coalition

Full compatibility

with all EDA tools

Full compatibility

with CMOS fabrication

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Reviving Moore's Law

Novel Circuit Topologies

Reduced circuit complexity (reduced transistors' count)

NeoMOS: a new paradigm

of VLSI design

Power-efficient, Smaller Floorplan, Lower Latency.

What is NeoMOS?

​NeoMOS is the trademark of our Quasi-CMOS technology.

Quasi-CMOS integrates standard CMOS circuits with our topology-modified circuits.

We have "non-existing" cells with unparalleled PPA such as:

# High Fan-in single-stage logic gates (6-32 inputs and more) 
# Power efficient flip-flops and registers

# Power efficient buffers

and more......

up to 40%    area saving

10%

potential yield improvement (GDPW)

more die per wafer

up to 3X

PPA improvement

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NeoMOS advantages

  • Extend Moore’s law and deliver superior PPA per design.

  • Saving the exponentially rising costs of migrating to a new technology node.

  • More computing power per Watt.

We are a member of:

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