Candidates should be proficient in the entire backend flow of a processors’ design. From RTL to GDSII including synthesis, formal verification, floor-planning, PnR, STA, as well as physical verification (DRC / LVS).

Managerial positions are available as well.

​Qualification, skills and knowledge requirements:​​

•  B.Sc. or a higher degree in Electrical Engineering (Electronics) / Physics / Computer Engineering – must
•  At least 3 years experience in backend design of SoC – must
•  Experience with place & route tools and flows (Synopsys / Cadence) – must
•  Understanding of DRC and LVS – must
•  Know-how in floor-planning, power grid distribution and analysis – advantage
•  Experience with integration of mixed-signal IPs and I/O integration – advantage

Candidates should have hands-on experience in circuit design of FinFET\GAA technology nodes.

Managerial positions are also available.

Qualification, skills and knowledge requirements:​

• ​B.Sc. or a higher degree in Electrical Engineering / Physics / Computer Engineering – must
• At least 3 years of experience – must
• Experience in gate-level design of circuits, simulations and characterization
• Familiarity with advanced nodes (7nm, 5nm,3nm, 2nm) – advantage
• Transistor-level design of standard cells – advantage

Candidates should have hands-on experience in RTL implementation and verification.

Managerial positions are available as well.

Qualification, skills and knowledge requirements:​

• B.Sc. or a higher degree in Electrical Engineering / Physics / Computer Engineering – must
• At least 3 years of hands-on experience – must
• Experience in RTL implementation of high-speed low-power designs
• Experience in VLSI development using Verilog or SystemVerilog, and with design verification, synthesis, timing/power analysis, and DFT
• Knowledge in modern high-performance CPU architecture and micro-architecture – advantage