Candidates should be proficient in the entire backend flow of a processors’ design. From RTL to GDSII including synthesis, formal verification, floor-planning, PnR, STA, as well as physical verification (DRC / LVS).
Managerial positions are available as well.
Qualification, skills and knowledge requirements:
- B.Sc. or a higher degree in Electrical Engineering (Electronics) / Physics / Computer Engineering – must
- At least 3 years experience in backend design of SoC – must
- Experience with place & route tools and flows (Synopsys / Cadence) – must
- Understanding of DRC and LVS – must
- Know-how in floor-planning, power grid distribution and analysis – advantage
- Experience with integration of mixed-signal IPs and I/O integration – advantage